- BA in Electronic eEngineering MSc. an advantage - Vast knowledge in design and verification tools and techniques - Experience of 3-10 years - Capable of taking responsibility for various VLSI tasks and bringing them to successful implementation. - Understanding of the backend / circuit requirements is an advantage. - Previous experience in the multimedia imaging is an advantage. - Experience with verilog coding (advantage

BSc Electrical Engineering
· At least 4 years’ experience in Logic design in Verilog or VHDL.
· Knowledge of digital signal processing and digital communication -Advantage
· Experience in SoC design and embedded processors – Advantage
· Advantage background in Synthesis, STA and P&R.
· Advantage background in DFT.

2-5 years experience as a Skilled Logic designer Experience with FPGA or ASIC design Experience with simulation environment

בוגר תואר ראשון (BSc) מהפקולטות - הנדסת חשמל / הנדסת מחשבים (במסלול חשמל), מהטכניון או מפקולטות מקבילות מאוניברסיטת ת"א או בן גוריון. ממוצע של לפחות 85 ; חובה לצרף גיליון ציונים לכל הפנייה של קורות חיים. ניסיון רלוונטי של 3-5 שנים מחברות דומות, על פי הפירוט הבא - " תכנון ציפ על כל שלביו " תכנון ASIC / FPGA " כתיבה ב- VHDL / Verilog " רקע ב- networking; הבנה בפרוטוקולי תקשורת TCP/IP או אחרים

בוגר תואר ראשון (BSc) מהפקולטות - הנדסת חשמל / הנדסת מחשבים (במסלול חשמל), מהטכניון או מפקולטות מקבילות מאוניברסיטת ת"א או בן גוריון. ממוצע של לפחות 85 ; חובה לצרף גיליון ציונים לכל הפנייה של קורות חיים. ניסיון רלוונטי של 3-5 שנים מחברות דומות, על פי הפירוט הבא - " תכנון ציפ על כל שלביו " תכנון ASIC / FPGA " כתיבה ב- VHDL / Verilog " רקע ב- networking; הבנה בפרוטוקולי תקשורת TCP/IP או אחרים

5+ years in VLSI design
3+ years in processor development
Experience in developing DSP processors is an advanta

•5 years ASIC experience •Experience in verification, ASIC flow and design •Knowledge in taking chips to production - advantage •B.Sc EE/M.Sc. EE from Technion, TAU or BSU •Atudai – advantage

3-6 years of experience in VLSI design Experience in ASIC/VLSI RTL implementation and testing Experience in FPGA development up to deployment of bitmap Experience in architecture and micro-architecture development from requirements Experience in Networking (L2 Switching), Virtualization or PCI-Express is an advantage Skills: Verilog-XL Xilinx FPGA FPGA Compiler Various verification tools

" BSEE of known university (Technion ,BGU,TLU) " Proven experience with backend team management focused on TSMC backend flow on large chips. - Relevant only for the TL. " Proven knowledge and deep understanding and "hands on" of backend tools (cadence backend is advantage). - Must! Proven knowledge of timing aspects. - Must! Deep understanding and experience 40nm technology in details. Proven knowledge on power optimization on deep sub-micron processes. Experience with fast IOs (DDR) an

Capable of leading small teams
Minimum 5 years of experience
MExperienced with architecture, specs, documentation and Verilog/VHDL coding
Knowledge of USB, DDR2/3 and modem PHY designs - advantage

Engineering degree, Deep Ethernet knowledge 5+ years of experience in Ethernet chip design Demonstrated strong analytical and strategic thinking skills and the ability to translate those skills into creative, marketable products Travel is required

Education: Electrical Engineering faculty
Requirements: · 2+ years of related work experience.
· Knowledge in digital design techniques, preferably from the field of ASIC design front end activities.
· Ability to create digital micro architecture from specifications.
· Familiar with the following is a plus:
· Digital design tools for the following flows: simulation, verification, synthesis, timing analysis, formal verification and lint.

Education: Electrical Engineering faculty
Requirements: · 2+ years of related work experience.
· Knowledge in digital design techniques, preferably from the field of ASIC design front end activities.
· Ability to create digital micro architecture from specifications.
· Familiar with the following is a plus:
· Digital design tools for the following flows: simulation, verification, synthesis, timing analysis, formal verification and lint.

" B.Sc. or higher in Electrical Engineering or computer engineering. " At least 5 years of experience in IC design. " Outstanding technical expertise in the successful completion of multiple VLSI implementation projects. " Experienced in authoring microarchitecture documents for complex SoCs blocks. " Experience with, and thorough understanding of up-to-date RTL design, simulation and verification methodology, tools and languages. " Experience with synthesis, STA and constraints. " Experi

BSEE, MSEE is advantage o Responsible for leading at least 2 chip developments in 90nm and below o Minimum 10 years in VLSI design: as a chip designer (min 5 years) and chip development manager (min 5 years) o Experience with high speed communications chips development - a plus o Proven track record of delivering several successful chip products to market in a designer role and development manager role o Knowledge of the entire development process, design tools, manufacturing processes, i

- Electrical Engineer (at least B.sc.) with total of at least 8 years experience in design and architecture. - Former experience in development of at least 2 complex VLSI chips. - 5 Experience in architecture and micro-architecture of at least 1 high speed complex VLSI chip in the communication space. - 3 years of experience as System Engineer and in Telecom system level definitions. - Deep Telecom system level understanding. - Deep Knowledge and experience in communication networks an

BSC in Electrical Engineering.
an advantage:
Experience in full VLSI project flows Experience in bringing-up VLSI methodologies and in tools evaluations Knowledge of synthesis tools such as Synopsis Design Compiler and Timing analysis tools such as Primetime Knowledge in verification processes

Required Education:
- BSEE/MSEE
3-5 years of chip design development
· Experience in logic design, verification and debug
· Knowledgeable in frontend design tools, Cadence based – preferred
· Experience in wireless and/or broadcast systems (WiFi, Bluetooth, GPS, DVB-T, etc.) – advantage
Required Skills:
· Strong technical skills
· Quick learner
·

B.Sc. in Electrical Engineering / Computer Engineering.
3+ years of experience in RTL for ASIC.
PCIe experience is an advantage.
Synthesis / STA experience is an advantage.

B.Sc in Electrical Engineering / Computer Engineering
Proven experience in automated verification tools (Specman) advantage : Experience in Software development using C/C++