Job Description:
For a hi-tech company developing electronic components for the field of communications, with offices in the Sharon
Job Description
" In charge of planning (architecture) and developing (coding) all the needed simulation environments for tests and debugs.
" The simulation environments are used to develop new RTL blocks, Full-chip integration, FPGA code and also to debug and resolve bugs found.
Job Qualifications:
" BSC in Electrical Engineering - from a well-known university
" At least 3 years experience
" Knowledge in Specman - an advantage.
" Knowledge in UVM - an advantage.
" BSC in Electrical Engineering - from a well-known university
" At least 5 years of experience as a verification engineer
" Former experience as a Verification TL - an advantage
" Knowledge of Specman - an advantage.
" Knowledge of UVM - an advantage.
Company Occupation:
High Tech, Semiconductor/capital equipment