Logic Verification Engineer

  • full time
  • None
  • Northen Sharon

Job Description:

Be a part of a logic verification team working on various logic verification tasks including direct testing, random testing UVM based on SoC platforms as well as IP level. Verification includes both SW and HW verification tasks.

Develop verification definitions for various products.
Take part in overall chip level coverage based verification work
Analyze and review product specifications for building related verification plans
Act as a reviewer for other team members work
Generate Behavioral Models for Analog blocks and verify it
Write proper documentation for work being done



Job Qualifications:

BSc in Electrical Engineering, from a well-known university.
2 - 4 years of experience in full chip and block level logic verification
Experienced and knowledgeable in advanced coverage based verification process using System Verilog and UVM – Advantage
Experience in Verilog and System Verilog coding
Assertions and other verification oriented features - advantage
Candidate must possess passion and commitment for completing projects on time.

Company Occupation:

High Tech, Semiconductor/capital equipment

Company Size:


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