· Definition, architecture, and development of verification environment for the company's next generation wireless modem.
· Block-level and Top-level environment planning and implementing.
· Develop test benches, test plans, verification agents and coverage collecting modules.
· Work closely with design and algorithm teams.
· Design algorithmic models for DSP blocks verification.
· Simulation and debug.
· BS/MS in EE/CE/Physics from leading universities with emphasis on signal-processing/communication background.
· At least 3 years experience with RTL verification in high-end environments.
· Both a good Team-player and can work independently.
· Ability to take technical leadership of verification plan and implementation.
· Strong communication skills.
· Experience with verification of signal processing modules - Must
· Experience with System Verilog - Must
· Experience with scripting languages - Must
· Experience with UVM - Must
· Experience with Unix environment - Must
· Experience with Cadence Verification IP - Advantage.
· Experience with protocols - PCIE, Eth, AXI - Advantage.
Medium (50 - 150)