Senior Verification Engineer

  • full time
  • 5+ years

Job Description:

For a start-up developing a product for networking, with offices in the south and with another branch

To join our exciting company at its very early stages and take part in and contribute to the development of a complex and challenging system


Southern Israel, Tel Aviv - Center



Job Qualifications:

B.Sc. / M.Sc. in Computer Engineering

At least 5 years experience in chip design and verification

In-depth familiarity with verification and debugging methodologies and tools

Knowledgeable in the Specman or System Verilog language

Extensive knowledge of verification flow (block level and full chip verification)

Familiar with one or more of the following verification environments: VMM, OVM, UVM

Familiar with formal verification - an advantage

Strong technical skills

Quick learner


Good communications skills

Team players, excellent human relations

Company Occupation:

High Tech

Company Size:

Medium (50 - 150)

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