Logic Digital Verification Eng

  • full time
  • 3+ years

Job Description:

The Company connectivity and intelligence to everyday products and packaging; things previously disconnect from the Internet of Things.

Additional Positions:

Verification, Verification Engineer

Location:

Northen Sharon, Haifa area

Category:

Hardware

Job Qualifications:

3+ years of System Verilog UVM DV experience.
Knowledge of Python, shell scripting.
Knowledge of assertions (SVA) or others.
Knowledge of digital ASICs design flows.
Knowledge of industry-standard tools, including Verilog, Verilog simulator, and debug
Bachelor’s or Master’s degree in electrical engineering or computer science, or equivalent experience
Functional Verification - System Verilog, Universal Verification Methodology (UVM)
Verilog, Application-Specific Integrated Circuits (ASIC)
Unix, Scripting - Python, Make, C-Shell/Bash
Version control (GIT)
SoC development work methodologies a

Company Occupation:

High Tech

Company Size:

Large (150+)

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