Job Description:
" Work as part of Digital Design team for design optimization prior to physical implementation.
" Define the Clock & Reset architecture with Architecture and Design team.
" Define and implement the Floorplan, SDC & UPF of Complex Sensor Chips with several Clock and Power domains.
" Work with different Samsung teams and 3rd party companies and guide them during full RTL to GDS flow towards signoff and Tape-out.
" Explore, develop and optimize FE and BE flow.
" Collaborate with other team members, including Software, Algorithms and Verification.
Job Qualifications:
" BSc in Electronic Engineering, MSc. an advantage
" At least 3 years of experience as a Backend Engineer
" Vast knowledge in full RTL to GDS
" Experience with floor-planning and power-grid planning
" Experience with synthesis, formal equivalence and STA.
" Capable of taking responsibility for various VLSI tasks and bringing them to successful implementation.
" Capable to manage communication I/F with external development teams.
Advantages:
" Experience as a technical leader.
" Experience on logic design.
" Experience on DFT (Scan/BIST), Physical verification and DFM
Company Occupation:
Video/Audio Related, High Tech, Semiconductor/capital equipment
Company Size:
Large (150+)