Job Description:
· Lead end-to-end mixed-signal design (ADC/DAC/RX/TX/PI) from concept to silicon validation.
· Define and optimize AFE architectures balancing bandwidth, linearity, power, and area.
· Provide technical leadership and mentorship, developing design checklists and best practices.
· Define test-chip architecture to validate sub-blocks and full AFE functionality prior to production.
· Perform simulation, modeling, and post-layout validation using Cadence Virtuoso, SystemVerilog, AMS etc.
· Support silicon bring-up and characterization, ensuring first-pass success.
Additional Positions:
Job Qualifications:
· M.Sc. or Ph.D. in EE with 15+ years in high-speed analog/mixed-signal design.
· Proven success with FinFET and deep sub-micron CMOS (16 nm and below).
· Track record in ADC/DAC/PLL/PI/RX/TX design.
· Strong analytical, communication, and cross-disciplinary leadership skills.
· Experience managing off-shore design service teams is a plus
Company Occupation:
High Tech, Semiconductor/capital equipment